PENDSVSET=PENDSVSET_0, PENDSTCLR=PENDSTCLR_0, PENDSTSET=PENDSTSET_0, ISRPENDING=ISRPENDING_0, PENDSVCLR=PENDSVCLR_0, RETTOBASE=RETTOBASE_0, NMIPENDSET=NMIPENDSET_0
Interrupt Control and State Register
VECTACTIVE | Active exception number |
RETTOBASE | Indicates whether there are preempted active exceptions 0 (RETTOBASE_0): there are preempted active exceptions to execute 1 (RETTOBASE_1): there are no active exceptions, or the currently-executing exception is the only active exception |
VECTPENDING | Exception number of the highest priority pending enabled exception |
ISRPENDING | Interrupt pending flag, excluding NMI and Faults 0 (ISRPENDING_0): No external interrupt pending. 1 (ISRPENDING_1): External interrupt pending. |
PENDSTCLR | SysTick exception clear-pending bit 0 (PENDSTCLR_0): no effect 1 (PENDSTCLR_1): removes the pending state from the SysTick exception |
PENDSTSET | SysTick exception set-pending bit 0 (PENDSTSET_0): write: no effect; read: SysTick exception is not pending 1 (PENDSTSET_1): write: changes SysTick exception state to pending; read: SysTick exception is pending |
PENDSVCLR | PendSV clear-pending bit 0 (PENDSVCLR_0): no effect 1 (PENDSVCLR_1): removes the pending state from the PendSV exception |
PENDSVSET | PendSV set-pending bit 0 (PENDSVSET_0): write: no effect; read: PendSV exception is not pending 1 (PENDSVSET_1): write: changes PendSV exception state to pending; read: PendSV exception is pending |
NMIPENDSET | NMI set-pending bit 0 (NMIPENDSET_0): write: no effect; read: NMI exception is not pending 1 (NMIPENDSET_1): write: changes NMI exception state to pending; read: NMI exception is pending |